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Macronix is releasing details of a new 3D NAND structure, called single-gate vertical channel (SGVC). The outfit will present a paper on the new tech at the 2017 IEEE International Electron Devices ...

Traditional planar NAND flash has had a long and illustrious run, but its time is over. Multiple manufacturers have announced they have no plans to pursue 2D NAND below the 15nm process node. Share on ...

The part 1 of this two-article series outlined the NAND flash technology and how it transitioned from 2D to 3D NAND flash. The article also explained the current challenges in the way of density ...

Use left and right arrow keys to seek audio. NEO Semiconductor has announced that it has developed the "world's first 3D NAND-like DRAM cell array," which aims to increase DRAM chip density using ...

A technical paper titled “3D NAND Flash Memory Cell Current and Interference Characteristics Improvement With Multiple Dielectric Spacer” was published by researchers at Myongji University, Soongsil ...

A virtual DOE-based process sensitivity check was performed for two tiers of channel holes in a 3D NAND device. The channel hole tilt distance, twist angle, and their sensitivities to the visible area ...

NAND flash technology is on a roll with advancements in cell structure and the subsequent boost in storage density. That allows this non-volatile-memory (NVM) chip to deliver faster throughput and ...

Samsung is continuing its aggressive push toward next-generation NAND Flash scaling with the development of a new 900-layer V-NAND design built using advanced wafer bonding technology. According to ...

SAN JOSE, Calif.--(BUSINESS WIRE)--NEO Semiconductor™, the developer of innovative X-NAND™ architecture, today announced the company has been granted two U.S. patents under the title “Methods and ...